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De Morgan's Theorem Explained

By Han · Published

De Morgan's theorem tells you how to complement an expression that contains both a group of variables and an operator between them. It is stated as two related laws:

  • First law: (A·B)' = A' + B'. The complement of an AND is the OR of the complements.
  • Second law: (A + B)' = A'·B'. The complement of an OR is the AND of the complements.

In words: to complement an expression, change each AND to an OR and each OR to an AND, then complement every individual variable. The two laws are duals of each other, and both extend to any number of variables, so (ABC)' = A' + B' + C' and (A + B + C)' = A'B'C'. This is the single most useful identity in digital logic, because it is what connects AND-OR thinking to the NAND and NOR gates that CMOS actually prefers to build.

Proof by truth table

A two-variable Boolean identity is proved by showing both sides agree on all four input rows. Here is the first law, (A·B)' = A' + B', verified column by column:

ABA·B(A·B)'A' + B'
00011
01011
10011
11100

The last two columns are identical for every row, which proves the law. The second law is proved the same way, and by the principle of duality proving one form is really enough to trust the other.

Worked examples

The theorem is applied by working from the outermost complement inwards. A common exam task is to push a complement bar down until it sits only on individual variables.

Example 1. Simplify (A + B'C)'.

  • (A + B'C)'
  • = A' · (B'C)'  (second law: complement of an OR)
  • = A' · (B + C')  (first law on the inner AND, and involution turns B'' back into B)
  • = A'B + A'C'  (distributive)

Example 2. Show that a NAND gate with both inputs complemented behaves as an OR gate.

  • A NAND of A' and B' is (A' · B')'.
  • By the first law, (A' · B')' = (A')' + (B')' = A + B.

So feeding inverted inputs into a NAND gives you an OR gate. This is not a curiosity; it is one of the constructions that makes NAND a universal gate, since you can now realise AND, OR, and NOT from NAND alone.

Bubble pushing: from AND-OR to all-NAND

De Morgan's theorem has a graphical form that circuit designers use constantly, called bubble pushing. On a gate diagram, a complement is drawn as a small bubble. The theorem says you can slide a bubble through a gate as long as you change the gate's shape between AND and OR at the same time. An AND gate with bubbles on all inputs and output is identical to an OR gate, and vice versa.

The practical payoff is converting a Sum of Products expression into a circuit built only from NAND gates. A two-level AND-OR network, when you add a pair of cancelling bubbles on every wire between the two levels, becomes a NAND-NAND network that computes exactly the same function. This is why the standard hardware realisation of an SOP expression is NAND-NAND, and the standard realisation of a Product of Sums expression is NOR-NOR. The link between canonical form and gate structure is covered further on the SOP vs POS page and put to work in the CMOS gate design guide.

Frequently Asked Questions

What are De Morgan's two laws?
The complement of a product equals the sum of the complements, (A B) prime = A prime + B prime; and the complement of a sum equals the product of the complements, (A + B) prime = A prime B prime.
How do you apply De Morgan's theorem to three variables?
The laws extend directly. (A B C) prime = A prime + B prime + C prime, and (A + B + C) prime = A prime B prime C prime. Change every AND to OR and every OR to AND, then complement each variable.
What is bubble pushing?
Bubble pushing is the graphical form of De Morgan. You slide an inversion bubble through a gate while switching the gate between AND and OR shape, which lets you redraw AND-OR logic as an equivalent all-NAND circuit.
Why is De Morgan important for CMOS?
CMOS builds inverting gates like NAND and NOR most efficiently. De Morgan is the rule that rewrites ordinary AND-OR logic into NAND-NAND or NOR-NOR form so it maps onto those efficient gates.

Keep learning

References: M. M. Mano and M. D. Ciletti, Digital Design; D. M. Harris and S. L. Harris, Digital Design and Computer Architecture.